• Your shopping cart is empty!

PDF Preview

IEC 63011-1 Ed. 1.0 b:2018

Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology

International Electrotechnical Commission , 11/28/2018

Publisher: IEC

File Format: PDF

$47.00$95.00


Standard By:International Electrotechnical Commission , 11/28/2018
Published:11/28/2018
Pages:24
File Size:1 file , 1.3 MB
Language:English, French
Note:This product is unavailable in Ukraine, Russia, Belarus
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.

More IEC Standards PDF

IEEE 1017.3-2021

IEEE 1017.3-2021

$34.00 $69.00

IEC 63356-1 Ed. 1.0 b:2022

IEC 63356-1 Ed. 1.0 b:2022

$95.00 $190.00

IEC 62648 Ed. 2.0 b:2022

IEC 62648 Ed. 2.0 b:2022

$91.00 $183.00

IEC 62604-2 Ed. 3.0 b:2022

IEC 62604-2 Ed. 3.0 b:2022

$117.00 $234.00